21年前，在Globalpress 'Leading the Recovery'会议中，一个小组讨论了'何时会有量产的90nm SoC'的问题。
来自Cadence Design Systems的高级副总裁Ted Vucurevich表示，预计最早在2004年将出现基于90nm工艺的FPGA设计。
来自Synopsys的Anton Domic认为，到2004年，将会有非FPGA芯片在90nm工艺上实现量产。
台积电的Andrew Moore也提到，公司的发展路线图显示，90nm工艺将在2004年实现。
量产90nm设计面临的挑战包括预期良率问题、客户信心问题、验证问题和成本问题。
➀ Undo's technology enables engineers to see exactly what their code did, facilitating root-cause analysis and improving collaboration.
➁ Undo is prominent in industries such as semiconductor design, databases, and networking, where debugging efficiency is critical.
➂ Undo's solution helps customers overcome challenges like development bottlenecks and missed deadlines by improving debugging processes.
➀ The article discusses a 9.8-GHz wideband, low phase noise, continuous wave (CW) RF signal generator reference design by Texas Instruments (TI). The design uses a programmable clock generator to reduce spurs and optimize system complexity.
➁ Key components include the LMX2592 PLL, LMK61E2 programmable reference clock, and LP38798-ADJ linear regulator. The design can be controlled via a PC or microcontroller.
➂ The reference design is suitable for applications like test and measurement, wireless communications, military and aerospace, radar detection, and microwave backhaul. It offers excellent phase noise performance and low in-band spurious levels.
➀ Alphawave Semi推出了针对高速互连半导体市场的最新光电子解决方案，预计到2028年市场规模将超过40亿美元。
➁ 新产品包括支持PAM4和Coherent-lite调制的数字信号处理器（DSP），以实现AI驱动的高速数据中心数据传输。
➂ 该解决方案利用了Alphawave的WidEye DSP架构和EyeQ高级诊断技术，并提供800G和1.6T的互连能力。
➀ Rise Design Automation has developed a solution that integrates generative AI with human expertise to improve RTL design productivity.
➁ The webinar hosted by RDA and SemiWiki will showcase how generative AI can enhance semiconductor design through high-level abstraction.
➂ The Rise AI solution translates natural-language intent into high-level design code, reducing manual effort in the design process.
➀ A student at the University of Applied Sciences in Hagen, Melanie Welp, has developed a contactless timing system for Paralympic swimming to prevent injury from head impacts.
➁ The prototype uses an ultrasonic sensor to measure the time at six meters and 50 centimeters before the edge of the pool.
➂ The system has been tested and shown to be possible without causing injury to swimmers.
➀ YES, a global leader in materials and interface engineering equipment solutions, has shipped the first commercial VeroTherm Formic Acid Reflow tool to a global semiconductor manufacturer from its Sulur, Coimbatore facility.
➁ This marks a significant milestone for YES and the Indian semiconductor ecosystem, as it is the first equipment produced in India for advanced semiconductor applications like HBM.
➂ The Sulur facility, which commenced operations in September 2024, is part of YES's strategic expansion plan to serve global customers more efficiently.
➀ Faraday Technology Corporation, a leading provider of ASIC design services, has selected Silvaco's FlexCAN IP for advanced automotive ASIC design.
➁ The collaboration aims to enhance the capabilities of automotive systems through the use of advanced semiconductor technology.
➂ Silvaco's FlexCAN IP is designed to meet the stringent requirements of automotive applications.
➀ This article discusses a reference design for extending SPI communication range using LVDS interface, which improves signal quality, reduces EMI, and maintains robustness against noise.
➁ The design utilizes TI's TIDA-060017 reference design, featuring LVDS driver and receiver modules, to transmit SPI signals over longer distances.
➂ The solution offers advantages such as enhanced speed, lower power consumption, and compatibility with a variety of industrial and medical applications.
➀ X-FAB, SMART Photonics, and Epiphany Design are collaborating to develop a photonics integration platform that combines InP and SOI technologies for multi tera-bit data rates.
➁ The platform aims to address customer requirements for high-speed data rates and energy efficiency in the manufacturing of optical transceivers.
➂ The collaboration has resulted in the development of a design flow and PDK that enables the design of photonics circuits integrating InP chiplets on an SOI platform.
➀ Researchers at NYU Abu Dhabi have developed an innovative 'off-the-jaw' sensing system that integrates force and angle sensors into laparoscopic handles to provide real-time feedback on gripping forces, tissue thickness, and stiffness.
➁ This system enhances the safety and precision of minimally invasive surgery (MIS) by restoring tactile feedback, which is crucial for differentiating tissues and applying appropriate force.
➂ The technology has potential applications beyond laparoscopic surgery, including telemedicine, endoscopy, and robotic-assisted surgery, with early trials showing a 30% improvement in surgical task efficiency.
➀ Cadence has launched Conformal AI Studio, an advanced AI tool designed to tackle the challenges of increasing SoC design complexity.
➁ Key features include distributed Boolean logic equivalence checking, automated functional ECO generation, and low-power static signoff tools.
➂ Early adopters like MediaTek have reported significant improvements in productivity, including 83% smaller ECO patches and over 100X faster power-state-table analysis, demonstrating its potential for applications in AI infrastructure, hyperscalers, and mobile devices.
➀ This webinar series focuses on 3D passive vendor component models for accurate EM-circuit co-simulation of high-frequency RF board designs.
➁ It explores simulating active circuits on boards using Modelithics models in Keysight EDA software.
➂ The Modelithics COMPLETE Library supports accurate simulations and provides a ready bill of materials.
➀ The organizers of this year's Design and Verification Conference & Exhibition Europe (DVCon Europe) have announced the deadline for abstracts for engineering papers and tutorials for this year's event.
➁ Abstracts need to be submitted by 22 April, with full engineering and research papers required by 30 June.
➂ DVCon Europe will be hosted by Accellera Systems Initiative and will take place at the Holiday Inn Munich, Germany from 14 to 15 October.
➀ A trawler caught 7 1/2 times as much fish as with conventional driftnet methods using new electronic fish-finding equipment developed by Kelvin and Hughes (Marine) limited;
➁ The story dates back to 65 years ago, when CERES (Combined Echo Ranging Echo Sounding) equipment was introduced;
➂ CERES combined echo-ranging and echo-sounding to improve fishing efficiency.
➀ Cadence successfully demonstrates first-pass silicon success of its UCIe™ standard package IP on Samsung Foundry's 5nm automotive process;
➁ This milestone highlights Cadence's commitment to high-performance, automotive-grade IP solutions;
➂ The solution meets the stringent requirements of next-generation automotive and high-performance computing applications.
➀ Achieving design rule compliance and optimal electrical performance in advanced semiconductor designs is crucial for minimizing design iterations and ensuring product reliability.
➁ Siemens Digital Industries Software's Calibre DesignEnhancer (DE) provides analysis-based EMIR solutions that enhance power integrity and reduce IR drop.
➂ Both Google and Intel utilized Calibre DE to address IR drop issues, demonstrating significant improvements in power grid robustness and electrical performance.
➀ Pragmatic Semiconductor and Electronics Weekly are hosting a webinar on the next-gen FlexIC design platform.
➁ The webinar is aimed at IC Designers, ASIC Engineers, and R&D professionals.
➂ It will cover the capabilities of the Pragmatic FlexIC Platform Gen 3, including rapid design and manufacturing of flexible mixed-signal ASICs.
➀ Ed向他的日记透露，执政不到一年的工党政府正在削减福利预算；
➁ 总理认为Ed是一个多面手，经常找他解决问题，Ed成了他的跑腿；
➂ 总理希望Ed帮助解决长期病假人员的问题，以减少福利预算开支，并避免政府形象受损。
➀ The article discusses how 3D NAND flash memory is becoming essential for meeting the increasing data storage needs driven by AI. It highlights the shift from 2D to 3D NAND structures, which allow higher storage density through vertical stacking.
➁ Key players like Samsung, Western Digital, and SK Hynix are mentioned as leaders in 3D NAND technology. The article also explores innovations in cryogenic etching technology, which enhances etching capabilities and addresses scaling challenges.
➂ The global NAND flash memory market is expected to grow significantly, reaching $83 billion by 2036. Lam Research is noted as a market leader in 3D NAND dielectric etching, with advancements like the Lam Cryo™ 3.0 enabling more efficient and precise etching processes.
