➀ Samsung's Q2 chip profit plunged 94% YoY to $288 million, with sales of $20 billion, compared to $4.7 billion profit in Q2 2024;

➁ The company secured a $16.5 billion order from Tesla for its Texas fab and anticipates more large foundry orders, with plans to ramp up 2nm process production in H2;

➂ Samsung noted HBM3E oversupply affecting pricing and is sampling HBM4, targeting volume production in 2025.

➀ Intel may halt marketing its 18A process to foundry customers, focusing instead on 14A, which could leverage high-NA EUV advantages to compete with TSMC;

➁ TSMC dominates the 2nm foundry market with high yields and significant planned capacity (50k wpm by 2025, 120-130k wpm by 2026), securing major clients like Apple and AMD;

➂ Existing 18A contracts with Microsoft and Amazon will continue, though Intel’s strategic shift aims to prioritize 14A for future competitiveness.

➀ Semiconductor manufacturing equipment industry is projected to grow at a 7% CAGR, reaching 11.1 million wafers per month (wpm) by 2028, driven by a 69% expansion in advanced process capacity (7nm and below) to 1.4 million wpm.

➁ 2nm-and-below capacity is expected to surge from 200k wpm in 2025 to 500k wpm by 2028, with equipment investment skyrocketing 120% CAGR to $43 billion, supporting mass production of 2nm chips by 2026 and 1.4nm by 2028.

➂ AI-driven demand for powerful computing (training, VR/AR, humanoid robots) is fueling investments across the semiconductor ecosystem, highlighting the industry's role in tech innovation and chip demand.

➀ Ex-Intel CEO Pat Gelsinger advises Japan's Rapidus to develop unique differentiating technologies beyond production efficiency to compete with TSMC.

➁ Rapidus plans to integrate wafer fabrication and advanced packaging at the same facility for faster cycles, though full automation will not be available immediately from 2027.

➂ The company aims to begin 2nm test production with GAA transistors and establish a chiplets R&D center, utilizing ASML EUV lithography tools for future HBM and 3D packaging.

➀ Sofics announces silicon validation of its IP on TSMC's 2nm technology, achieving exceptional power, performance, and area (PPA) metrics near physical limits;

➁ The IP focuses on built-in robustness for advanced integrated circuits, addressing demanding requirements in next-generation semiconductor designs;

➂ Implementation leverages TSMC's nanosheet transistor architecture, positioning the technology for cutting-edge applications.

➀ TSMC's 2nm process yield surpasses 60%, meeting HVM requirements for stable production;

➁ Samsung's 2nm yield lags at 40%, prompting major clients like AMD, Nvidia, and Apple to prioritize TSMC capacity;

➂ TSMC's 2nm wafer price approaches $30,000, with future 1.4nm costs projected to reach $45,000 by 2028.

➀ Imec and Tokyo Electron (TEL) have extended their partnership to advance semiconductor R&D for nodes beyond 2nm, focusing on patterning, logic devices, memory, and 3D integration;

➁ Their prior collaboration achieved breakthroughs in High NA EUV lithography and EUV resist coating technology, critical for production-level EUV adoption;

➂ The renewed efforts target High NA patterning, CFET devices, and sustainable manufacturing processes to drive innovation and reinforce global semiconductor leadership.

➀ TSMC's A16 (1.6nm) wafer prices may surge to $45,000, marking a 50% increase over N2 (2nm) nodes;

➁ Backside Power Delivery Network (BSPDN) technology drives higher costs, benefiting AI/HPC chips but requiring complex manufacturing steps;

➂ Chip development costs for N2 nodes could reach $725 million, limiting adoption to major players like Apple, NVIDIA, and Qualcomm.

➀ MediaTek plans to tape out its 2nm chip in September 2025, a major leap in semiconductor technology;

➁ The development highlights its collaboration with TSMC, leveraging advanced process nodes to compete in mobile and AI markets;

➂ The 2nm chip aims to enhance performance and efficiency for next-gen smartphones and AI-driven applications.

➀ Analog Bits, a mixed-signal IP specialist, is demonstrating its latest LDO, power supply droop detectors, and embedded clock LC PLLs on the TSMC N3P process.

➁ The company is also showcasing clocking PVT and droop detectors on the TSMC N2P process at the TSMC 2025 North America Technology Symposium.

➂ CEO Mahesh Tirupattur emphasizes the importance of power management in architectural design, especially for advanced datacenters, AI/ML applications, and automotive SoC's.

➀ TSMC is advancing the production start date for its second Arizona fab, Fab 21, by at least two quarters; the original plan was set for 2028.

➁ Fab 21 is being equipped for a 3nm process, with modules for 2nm and 1.6nm processes to begin construction this year, with production expected in 2029.

➂ TSMC CEO CC Wei states that the expansion will create an independent leading-edge semiconductor manufacturing cluster in the U.S., contributing to a more comprehensive supply chain ecosystem.

➀ TSMC plans to produce 30% of its N2 (2nm-class) output in the U.S., making its Fab 21 site an independent semiconductor manufacturing cluster.

➁ TSMC aims to accelerate the construction of new Fab 21 modules to produce chips on N3 (3nm-class), N2, and A16 (1.6nm-class) nodes.

➂ Around 30% of TSMC's N2 and A16 chips produced in the U.S. will be a significant development.

➀ A prototype for an E-Bike terminal has been developed at the Hochschule Karlsruhe (HKA) as part of a project aiming for sustainable mobility;

➁ The terminal is constructed primarily from renewable resources (wood) and is designed to be replicable in other locations;

➂ The project includes a solar power system to charge the E-bikes and features social components such as a meeting point for students and staff.

➀ This study explores the development of chitosan-silanized hexagonal boron nitride (hBN) nanocomposite films;

➁ It focuses on their structural, mechanical, and barrier properties;

➂ The research aims to enhance the performance of biodegradable polymer films, overcoming limitations of chitosan.

➀ MinebeaMitsumi has announced a tender offer to acquire thermistor specialist Shibaura Electronics to save it from a hostile takeover bid from Taiwan's Yageo Corp.;

➁ Shibaura Electronics, with a 13.5% world market share in thermistors, is a key player in vehicles, wind turbines, and industrial robots;

➂ Yageo Corp. plans to make a takeover bid on May 7th, offering $29 per share, but MinebeaMitsumi is offering $31 per share, totaling $485 million for the company.

➀ Ed在日记中透露，关税问题让他感到自豪，他预见到这将是Liz Truss故事的翻版，并相应地应对。

➁ 到周二晚上，关税已使全球股市价值蒸发10万亿美元，而到周四早上，股市又上涨了6万亿美元。

➂ 所有金融人士都说，当政府债券开始抛售时，总统将改变方向，就像Liz在她预算后大量出售金边债券时那样。

➀ Samsung has established a team to develop 1nm process technology using high-NA EUV machines for mass production in 2029, according to the Seoul Economic Daily.

➁ It is unclear whether Samsung has ordered any of ASML's $350 million high-NA EUV machines.

➂ Samsung denied reports of canceling its 1.4nm process development, admitting project delays and a rumored shift of resources to the 2nm process.

➀ Hamamatsu Photonics Europe has launched NZConnectMD Scan, an image acquisition platform for digital pathology workflows.

➁ The software allows for centralized control of multiple NanoZoomer MD Series scanners.

➂ Key features include barcode-based slide tracking, workflow balancing, and space optimization.

➀ U.S. President Donald Trump has signed an executive order to create the United States Investment Accelerator Office;

➁ The office aims to negotiate better deals for taxpayers;

➂ There are concerns about the impact on existing contracts and awards.

➀ A recent study introduces a Janus membrane for water purification and energy generation, aiming to address water scarcity and energy needs;

➁ The membrane uses cellulose nanofibers (CNF) and a modified MXene to improve performance over longer periods;

➂ The Janus membrane demonstrates better performance than traditional membranes, achieving a high evaporation rate and photothermal conversion efficiency, and effectively preventing salt buildup.