➀ Numem, a Sunnyvale startup, has developed MRAM-based chiplets designed for AI systems. Sampling is expected to start in late Q4'25.

➁ The chiplets offer up to 4TB/s memory throughput and support 4GB per stack package, making them scalable for demanding AI workloads.

➂ Numem's technology claims to significantly reduce standby power and deliver up to 4x faster performance than HBM while maintaining ultra-low power consumption.

➀ Blue Cheetah Analog Design has successfully taped out its next generation BlueLynx™ die-to-die (D2D) PHY on Samsung Foundry's SF4X 4nm advanced manufacturing process.

➁ The latest PHY supports both advanced and standard chiplet packaging with an aggregate throughput exceeding 100 Tbps.

➂ It achieves industry-leading silicon area footprint.

➀ Sarcina Technology, led by Founder and CEO Larry Zu, offers comprehensive post-silicon ecosystem services including package design, assembly, testing, qualification, and production services for leading semiconductor companies.

➁ In 2024, Sarcina developed a Bump Pitch Transformer (BPT) to simplify and reduce costs in 2.5D package designs, addressing challenges related to costly silicon TSV interposers.

➂ Sarcina aims to increase awareness of its capabilities, especially its Application Specific Advanced Package (ASAP) Service, through presentations and participation in industry conferences.

➀ Defacto Technologies, led by Dr. Chouki Aktouf, specializes in innovative SoC design solutions and has become a leader in front-end SoC integration.

➁ In 2024, the company focused on incorporating AI technologies into their R&D projects, aiming to introduce AI-based automation in their tools.

➂ For 2025, the company plans to focus on AI-based EDA and attend key industry conferences like DAC and DATE.

➀ Multi Chip Modules (MCM) are emerging as a game-changing solution for faster and more powerful electronics.

➁ Traditional chip designs can no longer meet the growing need for performance and space-saving designs.

➂ MCMs integrate multiple chips into a single package, offering a sophisticated approach to semiconductor architecture.

➀ Heterogeneous integration is a solution that allows different materials and components to work together seamlessly, enhancing system performance.

➁ This approach enables the development of sophisticated electronic devices that are smaller, faster, and more efficient.

➂ Understanding heterogeneous integration involves grasping its key concepts and technologies.

➀ Chip Scale Packaging (CSP) is an advanced packaging technology that allows for smaller, more efficient electronic components.

➁ CSP is transforming device design and manufacturing processes across various industries.

➂ The technology optimizes space usage and enhances performance in microelectronics.

➀ NVIDIA CEO Jensen Huang is collaborating with TSMC on robotics and autonomous vehicle development.

➁ NVIDIA's upcoming Jetson Thor SoC and Project GROOT robot are part of this collaboration.

➂ The collaboration includes a joint silicon photonics research project between NVIDIA and TSMC.

➀ The incoming U.S. Commerce Secretary supports the CHIPS and Science Act, indicating continuity despite political changes.

➁ Major semiconductor companies like Intel, GlobalFoundries, TSMC, Texas Instruments, and Samsung Foundry are investing heavily in U.S. fabs.

➂ Despite support from the new Commerce Secretary, some in Trump's team criticize the rapid distribution of funds before the transition.