➀ Intel's ability to catch up with TSMC in process technology is questioned; ➁ Malcolm Penn, CEO of Future Horizons, suggests it could take 10 years to catch up; ➂ Intel's process capability is about a year behind TSMC; ➃ TSMC has been running its 3nm process for a year, while Intel's best process in volume production is Intel 4 at Leixlip.

➀ Malcolm Penn, CEO of Future Horizons, highlights the uncertainty in the chip industry, with a strong Q4 2023 followed by a minus 5.7% Q1 2024 and an unexpected 6.5% growth in Q2 2024. ➁ The industry faces challenges such as weak global economy, low unit demand, excess capacity, and declining ASPs. ➂ Future Horizons forecasts a median annual growth of 15% for 2024 with a bull forecast of 17% and a bear forecast of 13%.

➀ Nee Guohua emphasized that the integration of RISC-V and Chiplet will promote the innovation of DSA (Domain Specific Architecture) and lead to the 'Hardware Defined by Demand' era; ➁ The level of China's chip design has reached the world's advanced level in digital chips, but there is still a gap in analog chips; ➂ Scientists must not only have solid professional knowledge but also be brave in innovation and willing to take responsibility; ➃ RISC-V, as an emerging open instruction set architecture, is gaining global attention and is expected to promote innovation with its openness, efficiency, flexibility, low power consumption, modularity, and scalability; ➄ Chiplet technology, which encapsulates multiple pre-designed small chips into a complete SoC, is introduced to lower design complexity and cost while improving performance and flexibility; ➅ DSA (Domain Specific Architecture) computing architecture, characterized by customized design to better meet specific needs, shows great potential in emerging fields such as AI and IoT; ➆ The integration of RISC-V, extended instruction sets, Chiplet, and interconnect technologies in DSA new servers is expected to replace traditional X86 servers in terms of cost-performance and energy consumption, thus promoting the transformation and development of the Chinese server market; ➇ In the new era of 'Hardware Defined by Demand', hardware design will no longer rely solely on traditional standardized and generalized approaches but will be more closely integrated with actual application needs.

➀ Faraday Technology Corporation introduces an advanced packaging coordinated platform for chiplet vertical disintegration; ➁ The platform integrates multiple vendors and multi-source chiplets; ➂ The platform offers core services of design, packaging, and production.

➀ Chiplets are small, modular chips that can be combined to form a complete system, offering flexibility and cost-effectiveness. ➁ They optimize technology by using reliable legacy nodes for IO and bus chiplets and cutting-edge technology for compute chiplets. ➂ Chiplets are expected to expand into various applications, including automotive and high-performance computing, due to their modular design and potential to keep pace with Moore’s Law.

➀ AMD's Instinct MI300 series packaging adopts advanced 3.5D technology, integrating traditional chip design with organic packaging, passive silicon interposers, IOD, XCD, CCD layouts, and HBM3 chips. ➁ The design is based on a Chiplet architecture, featuring multiple small chips connected through high-speed communication channels, achieving communication rates up to 3 TB/s and 2.4 TB/s. ➂ The packaging complexity poses challenges, especially in managing data lines, power, and ground connections, requiring precise design and layout to ensure stable power supply to each Chiplet.

➀ Introduction to UCIe 2.0 specification; ➁ Potential to solve technical and business challenges in chiplet integration; ➂ Impact on the future of chiplet technology.

➀ The Chiplet Center of Excellence (CCoE) has been launched by three Fraunhofer Institutes in Dresden to advance chiplet technology in partnership with industry. ➁ Researchers at CCoE are developing workflows and methods for electronics design, demonstrator construction, and reliability evaluation for the automotive industry. ➂ The CCoE aims to support the competitiveness and technological sovereignty of European industrial sectors, focusing initially on automotive electronics applications.

➀ The Chiplet Center of Excellence (CCoE) in Dresden, initiated by three Fraunhofer institutes, aims to advance the adoption of chiplet technologies in collaboration with industry. ➁ The center will focus on developing workflows, methods, and reliability assessments specifically for the automotive industry. ➂ CCoE seeks to enhance the competitiveness and technological sovereignty of European industrial sectors, with initial applications in automotive electronics.

1. YorChip predicts 2026 as the year of the chiplet; 2. Dyson may lay off 1000 staff in the UK; 3. Microchip announces a 64bit processor using RISC-V architecture.

1. Intel has introduced the Optical Compute Interconnect chiplet, a pioneering fully integrated optical I/O solution. 2. This innovation allows for up to 4 Tbps of optical connectivity. 3. The chiplet is designed to enhance CPUs or GPUs with high-speed optical links.

1. Alphawave Semi has announced the tape-out of an industry-first IO chiplet on TSMC's 7nm process, supporting UCIe, Ethernet, PCIe, and CXL. 2. The chiplet delivers a total bandwidth of up to 1.6Tbit/s and supports multiple standards including PCIe 6.0, CXL 3.x, and 800G Ethernet. 3. The company highlights the flexibility and scalability this chiplet provides for hyperscaler and datacenter infrastructure customers, allowing them to mix and match custom SoCs with I/O connectivity or memory expansion chiplets.