Recent #UCIe news in the semiconductor industry

5 months ago

➀ Ayar Labs has unveiled the world's first UCIe optical chiplet, designed to eliminate data bottlenecks, reduce latency, and cut power consumption while enabling interoperability between chiplets from different vendors.

➁ The TeraPHY chiplet offers 8 Tbps bandwidth and is powered by Ayar Labs' 16-wavelength SuperNova light source, making it suitable for scalable AI architectures.

➂ AMD supports the UCIe standard, recognizing its importance in driving innovation and meeting the needs of AI scale-up solutions.

AIAI ChipAMDChipletUCIe
6 months ago

➀ Engineered substrate technology is driving the semiconductor industry from traditional planar scaling to innovative materials and 3D integration.

➁ Companies like Soitec, Intel, and Samsung are leading the adoption of this technology.

➂ Foundries are increasingly recognizing the strategic importance of engineered substrates like Fully Depleted SOI (FD-SOI) for their benefits in cost and performance.

3D IntegrationChipletEngineered SubstrateFD-SOIFoverosGaNIntelMoore's LawSEMICONDUCTORSamsungSiCSmart Cut™SoitecUCIe
about 1 year ago
1. Alphawave Semi claims to have successfully brought up the first 3nm UCIe Die-to-Die (D2D) IP with TSMC's CoWoS advanced packaging technology. 2. The complete PHY and Controller subsystem was developed in collaboration with TSMC, targeting applications like hyperscaler, HPC, and AI. 3. The IP supports multiple protocols and integrates live per-lane health monitoring, setting a new benchmark in high-performance connectivity solutions.
Alphawave SemiTSMCUCIe
about 1 year ago
1. Alphawave Semi has announced the tape-out of an industry-first IO chiplet on TSMC's 7nm process, supporting UCIe, Ethernet, PCIe, and CXL. 2. The chiplet delivers a total bandwidth of up to 1.6Tbit/s and supports multiple standards including PCIe 6.0, CXL 3.x, and 800G Ethernet. 3. The company highlights the flexibility and scalability this chiplet provides for hyperscaler and datacenter infrastructure customers, allowing them to mix and match custom SoCs with I/O connectivity or memory expansion chiplets.
AlphawaveChipletUCIe