1. Alphawave Semi claims to have successfully brought up the first 3nm UCIe Die-to-Die (D2D) IP with TSMC's CoWoS advanced packaging technology. 2. The complete PHY and Controller subsystem was developed in collaboration with TSMC, targeting applications like hyperscaler, HPC, and AI. 3. The IP supports multiple protocols and integrates live per-lane health monitoring, setting a new benchmark in high-performance connectivity solutions.
Related Articles
- Industry’s First UCIe IP Featuring TSMC CoWoS Packaging10 months ago
- Chip news live: All the latest in the semiconductor industryabout 14 hours ago
- Weaponizing Tariffs: Top Stocks For The Summer Heat1 day ago
- TSMC ceremony marks early move to 2nm mass production2 months ago
- Jiang Shangyi: Intel is Now a 'Minor Player', Should Merge with Established Chip Technology Companies2 months ago
- Semiconductor CapEx Down in 2024 up in 20252 months ago
- When Will We See A 90nm SoC?2 months ago
- Nvidia's Jesnen Huang expects GAA-based technologies to bring a 20% performance uplift2 months ago
- Alphawave Semi sampling photonics interconnect ICs for hyperscalers2 months ago
- Foundry 2.0 to grow 11% this year2 months ago