➀ The CHIIPS podcast episode features Ras Attale discussing chip design and adapting to the UK as an immigrant from Sri Lanka;

➁ Topics include cybersecurity challenges in chip design and her involvement with Women in Techworks to empower women in electronics;

➂ Listeners are encouraged to explore the podcast series and related industry insights.

➀ Siemens Digital Industries Software launched Tessent AnalogTest, an automated DFT solution that reduces analog circuit testing time from months to days by generating digital test patterns and minimal-impact DFT circuitry;

➁ The software achieves >90% defect coverage verification within hours using cost-effective digital ATE, replacing expensive mixed-signal testers, and aligns with IEEE P2427/P1687.2 standards for functional safety and parametric testing;

➂ Early partners are already utilizing the solution, with general availability planned for December 2025, promising accelerated time-to-market and up to 100x faster tests compared to traditional methods.

➀ Siemens' Tessent MemoryBIST now supports NVRAM testing with configurable controllers and hierarchical BIST architecture;

➁ The solution addresses emerging challenges in 3D IC designs and advanced process nodes through automated trimming/calibration workflows;

➂ Enables field-repairable memory systems with integrated ECC and multi-level test capabilities for AI-driven applications.

➀ Siemens and Perforce discussed their collaboration on integrating IP lifecycle management (IPLM) with semiconductor tools, emphasizing software-defined products and system-level verification;

➁ The digital twin approach and metadata interoperability across EDA tools enable traceability from requirements to verification, critical for automotive and safety-critical systems;

➂ AI-powered tools and data lakes are leveraged to optimize verification efficiency and manage design decisions across hardware-software co-development.

➀ Siemens and Perforce integrate digital twins with version control to streamline semiconductor design workflows;

➁ The partnership establishes traceable digital threads across chip design lifecycle using Siemens' virtual simulation and Perforce's data management;

➂ This collaboration addresses complex challenges in AI-driven chip architectures while targeting $1 trillion semiconductor market growth by 2030.

➀ Siemens, Arm, and the University of Southampton launched the Cre8Ventures Open Higher Education Programme, integrating Siemens' Digital Twin Marketplace, Arm's developer resources, and academic lab-to-fab capabilities;

➁ The program provides students with industrial-grade EDA tools, startup support, and commercialization pathways to bridge academia with industry;

➂ Supported by the Semiconductor Education Alliance, it aligns with the EU Chips Act’s goals to cultivate semiconductor talent and strengthen Europe’s tech sovereignty.

➀ The DAC event highlighted Siemens and NVIDIA's collaboration to integrate AI into EDA tools, addressing semiconductor design complexity and efficiency challenges.

➁ Siemens introduced its AI-driven EDA system for enhanced design workflows, while NVIDIA showcased CUDA-X libraries and NeMo frameworks to accelerate AI adoption in chip design.

➂ The partnership emphasizes AI's role in improving productivity, with NVIDIA's inference microservices and Siemens' domain-specific AI models targeting PCB and IC design optimization.

➀ Siemens' Aprisa AI tool reduces SoC timing closure from 10-12 weeks to 1-2 weeks, achieving 3X compute efficiency and 10% PPA improvements;

➁ AI addresses industry challenges like 3D IC complexity and rising costs, enabling 6-9 month design cycles (vs. 12-18 months) and addressing engineering shortages through accelerated training;

➂ Agentic AI and cloud-based EDA tools are emerging as future trends, with Siemens showcasing natural language interfaces for clock tree generation and customizable LLM integration.

➀ Arm licenses Siemens' Veloce verification software to enhance its Neoverse Compute Subsystems;

➁ Veloce system offers modular, datacenter-compatible configurations and scalable emulation from 40 million to 40 billion gates;

➂ Veloce PCIe composite device technology integrates ACS, PCIe, and NVMe for streamlined IP verification and debugging.

➀ Codasip seeks a buyer with EU grant incentives (€380M total funding potential);

➁ Siemens integrates generative AI across its EDA tools (Questra, Tessent, etc.) for chip/PCB design;

➂ Wolfspeed enters bankruptcy protection with $4.6B debt reduction, while Intel may abandon 18A foundry marketing to focus on 14A.

➀ Siemens introduced generative and agentic AI capabilities across its EDA portfolio, enhancing semiconductor and PCB design tools including Aprisa, Calibre, and Solido.

➁ Aprisa AI improves productivity by 10x, speeds tapeout time by 3x, and boosts PPA metrics by 10%, while Calibre Vision AI halves violation resolution time with intelligent clustering.

➂ The AI system offers open, customizable workflows with multi-LLM support, prioritizing data control for users, and is now available for early access across Siemens' EDA tools.

➀ The MEGA project, a 1983 collaboration between Philips and Siemens, aimed to advance Europe's semiconductor industry by developing a Megabit DRAM to compete with US and Japanese rivals.

➁ Jurgen Knorr of Siemens emphasized the necessity of mass production and cost-effectiveness for competitiveness, highlighting Europe's historical lag in adopting standardized, high-volume manufacturing strategies.

➂ The article critiques Europe's neglect of these principles, leading to challenges from Chinese semiconductor firms offering mature, cost-effective technologies.

➀ Siemens Digital Industries Software announces acquisition of Excellicon, a specialist in timing constraints software for chip design;

➁ The deal aims to enhance power, performance, and area (PPA) optimization in Siemens' EDA tools, accelerate design closure, and improve workflow efficiency;

➂ Excellicon's timing constraint management technology will integrate with Siemens' Questa, Tessent, and other platforms to strengthen verification and implementation processes.

➀ Siemens and Intel Foundry certify Calibre nmPlatform and Solido tools for Intel 18A PDK, enabling early design work and IP development;

➁ A reference workflow for EMIB-T and EMIB technologies using Siemens' 3D IC tools is established, supporting design exploration;

➂ Siemens joins the Intel Foundry Accelerator Chiplet Alliance to advance multi-die interconnect solutions.

➀ Siemens Digital Industries Software has acquired DownStream Technologies, a provider of manufacturing data preparation tools for PCB design.

➁ The acquisition aims to expand Siemens' presence in the small and medium-sized business (SMB) market.

➂ DownStream Technologies' CAM350 suite of tools allows customers to verify and automatically prepare PCB design data for fabrication, reducing errors and streamlining the transition from design to production.

➀ Siemens EDA在AI方面的深度，包括1400名AI专家和近4000项专利；

➁ 随着芯片复杂性的增加，行业预计到本世纪末将短缺27,000名专家设计师；

➂ Siemens利用三种类型的AI在验证领域：基于无监督学习的分析型AI、基于机器学习和统计分析的预测型AI，以及基于大型语言模型的生成/代理支持型AI。

➀ This article discusses the challenges of physical design verification for custom and analog/mixed-signal IC designs.

➁ It introduces Siemens' Calibre Pattern Matching tool for early-stage physical verification.

➂ The tool allows for interactive symmetry checking and early IP placement verification, reducing design time and improving quality.

➀ Siemens Digital Industries Software has introduced an automated and certified workflow for TSMC's InFO packaging technology.

➁ The workflow is driven by Innovator3D IC and includes Xpedition Package Designer software, HyperLynx DRC, and Calibre nmDRC technologies.

➂ Siemens Digital's svp AJ Incorvaia highlights the expansion of design avenues for customers.

➀ Siemens Digital Industries Software announces an exclusive OEM agreement with Alphaw Semi to market its high-speed interconnect silicon IP product portfolio through its sales channels.

➁ The agreement includes Alphawave Semi's leading IP platform for connectivity and memory protocols such as Ethernet, PCIe, CXL, HBM, and UCIeDie-to-Die).

➂ The collaboration will provide comprehensive Spec to Silicon Solutions by leveraging the combined capabilities and strengths of both companies.