➀ NVIDIA确认Blackwell Ultra和Vera Rubin AI架构进展顺利，预计在GTC 2025上将有重大宣布；
➁ 尽管初期有延误，但生产已加速，保持了年度发布节奏；
➂ 新一代Rubin AI GPU将采用先进的HBM4内存，SK hynix、三星和美光等合作伙伴参与其中。
Recent #HBM4 news in the semiconductor industry
➀ SK hynix has achieved a 70% yield rate on its HBM4 12-Hi memory, which is set to be used in NVIDIA's upcoming Rubin R100 AI GPUs.
➁ The test yield is an indicator that can be used to make estimations on the actual future yield rate, with SK hynix aiming for a yield upwards and into the late 90% range.
➂ TSMC, as a key partner, is expected to expand its CoWoS advanced packaging capacity to handle the large Rubin chip demand.
➀ SK Hynix Chairman Chey Tae-won is rumored to meet with NVIDIA CEO Jensen Huang at CES 2025 to discuss HBM4 memory for future AI GPUs; ➁ NVIDIA has requested expedited HBM4 production for its Rubin R100 AI GPUs; ➂ NVIDIA's CES keynote will highlight advancements, including the GeForce RTX 50 series.
➀ Samsung is preparing for 1c DRAM mass production at its Pyeong Plant 4; ➁ The 1c DRAM is a 6th generation 10nm-class technology expected to be fully commercialized in 2025; ➂ Samsung aims to enhance its competitiveness in the AI market with the new technology.
➀ NVIDIA's Rubin AI GPU architecture, originally set for 2026, is now expected six months earlier; ➁ Utilizing TSMC's 3nm process and next-gen HBM4 memory; ➂ Follows the Blackwell architecture, with NVIDIA collaborating with Taiwanese partners on R100-powered AI servers.
➀ Samsung is developing customized HBM4 memory solutions for Meta and Microsoft; ➁ Mass production is expected by the end of 2025; ➂ The new HBM4 memory will offer 2TB/sec bandwidth and up to 48GB capacities.
➀ NVIDIA CEO Jensen Huang requested SK hynix to accelerate the supply of HBM4 memory by six months; ➁ SK hynix originally planned to have its next-gen HBM4 memory ready in the second half of 2025; ➂ NVIDIA currently uses SK hynix's HBM3E memory for its AI chips and plans to use HBM4 in its upcoming Rubin R100 AI GPU.
➀ SK hynix plans to tape-out its HBM4 memory in October 2024; ➁ HBM4 offers a 40% increase in bandwidth and 70% reduced power consumption compared to HBM3E; ➂ NVIDIA's next-gen Rubin R100 AI GPU will use HBM4 memory, expected to be available in 2025.
1. TSMC and Global Unichip have secured bulk orders for base dies used in SK hynix's next-gen HBM4 memory. 2. The collaboration between TSMC and Creative is focused on developing HBM key peripheral components for AI servers. 3. The industry anticipates significant changes in HBM4, including increased stack height and the integration of logic ICs to enhance bandwidth transmission speeds.
1. Samsung is preparing to launch 3D packaging services for HBM4 within the next 12 months. 2. The technology is intended for next-gen AI GPUs, which will be released in 2025. 3. The new 3D packaging technology, called SAINT-D, will be used to stack HBM chips vertically on top of a GPU for increased speed, without the need for a silicon interposer.
1、TSMC 将生产基于 12nm 和 5nm 节点的下一代 HBM4 基底_die。 2、该公司正在与 Micron、Samsung 和 SK Hynix 等 MEMORY 厂商合作，使用高级逻辑 process 制作 HBM4 基底_die。 3、HBM4 基底_die 将采用 N12FFC+ 和 N5 两种制程技术，提供更高的性能和更低的功耗
SK Hynix is planning to use TSMC’s base die technology for its next-generation high bandwidth memory (HBM).
➀ Samsung and SK Hynix are competing to supply HBM4 to Broadcom, a rising competitor against NVIDIA.
➁ SK Hynix has received a request from Broadcom for a large supply of custom HBM4.
➂ Samsung is also in discussions with Broadcom about supplying HBM4.
➀ TSMC's HBM4 memory launch brings significant changes, with the most noticeable being the expansion of memory interfaces from 1024 to 2048 bits;
➁ TSMC revealed details about base die for HBM4 manufacturing using improved versions of its N12 and N5 processes at the 2024 European Technology Symposium;
➂ TSMC plans to adopt two different manufacturing processes, N12FFC+ and N5, for the first batch of HBM4 product packaging;
➃ TSMC is working with major HBM memory suppliers like Micron, Samsung, and SK Hynix to integrate HBM4 memory technology using advanced process nodes;
➄ TSMC's N12FFC+ process is suitable for achieving HBM4 performance, allowing memory manufacturers to build 12-Hi (48GB) and 16-Hi (64GB) stacks with over 2TB/s bandwidth;
➅ TSMC's N5 process will integrate more logic functions, reduce power consumption, and provide higher performance with very small interconnect spacing, enabling HBM4 direct 3D stacking on logic chips.
➀ HBM4 is the key to advancing AI by providing high capacity and performance for large-scale data-intensive applications; ➁ HBM4 improves AI and ML performance through increased bandwidth and memory density, reducing bottlenecks and improving system performance; ➂ HBM4 is designed with energy efficiency in mind, achieving better performance per watt and is crucial for the sustainability of large-scale AI deployments; ➃ HBM4's scalability allows for growth without becoming too expensive or inefficient, making it crucial for deploying AI in various applications.
➀ HBM4 is set to double the channel width of HBM3E, significantly enhancing data transfer speeds and performance. ➁ SK Hynix and Samsung are in a fierce race to be the first to mass-produce HBM4, with both aiming to supply Nvidia's AI chips. ➂ The integration of memory and logic semiconductors in a single package remains a significant challenge for HBM4 development.