➀ TSMC's A16 (1.6nm) wafer prices may surge to $45,000, marking a 50% increase over N2 (2nm) nodes;

➁ Backside Power Delivery Network (BSPDN) technology drives higher costs, benefiting AI/HPC chips but requiring complex manufacturing steps;

➂ Chip development costs for N2 nodes could reach $725 million, limiting adoption to major players like Apple, NVIDIA, and Qualcomm.

➀ U.S. bans EDA software exports to China, blocking updates for Synopsys/Cadence users;

➁ Xiaomi (3nm XRing 01 SoC), Lenovo and Bitmain's advanced chip designs impacted;

➂ Chinese EDA tools (Empyrean/Primarius/Semitronix) lag in cutting-edge nodes but advance in localization.

➀ Intel collaborates with SoftBank to develop stacked DRAM alternatives to HBM through joint venture Saimemory, targeting commercialization by 2030;

➁ NVIDIA unveils plans for a China-compliant B30 AI chip with multi-GPU scaling, circumventing export controls;

➂ TSMC explores building a UAE-based fab with US government support, mirroring its Arizona project scale.

➀ Samsung's 3nm chip yields remain at ~50% after three years of mass production, per South Korean reports;

➁ Major tech clients like NVIDIA and Qualcomm are shifting orders to TSMC due to Samsung's yield challenges;

➂ Samsung continues investing to improve 3nm technology amid intense competition in advanced semiconductor nodes.

➀ TSMC’s advanced roadmap for the decade positions it as the dominant leader in leading-edge logic manufacturing, creating pressure on Intel and Samsung;

➁ Intel and Samsung’s high-risk bets on GAA, BSPD, and high-NA EUV technologies failed to surpass TSMC, leaving the latter as the sole trusted choice for cutting-edge foundry services;

➂ TSMC’s execution excellence has led to a de facto monopoly, raising industry concerns about reduced competition despite its reputation for fairness and responsibility.

➀ TSMC's first European Design Center in Munich is set to launch in Q3 2025;

➁ Focuses on developing high-density, high-performance, and energy-efficient chips for automotive and industrial applications;

➂ The center will offer design support and collaborate with ecosystem partners to strengthen TSMC's presence in Europe's semiconductor market.

➀ TSMC showcased its advanced semiconductor technologies at the 2025 Europe Symposium, highlighting N3 nodes' high-volume production with variants for CPUs, cost-effective products, and automotive applications;

➁ Unveiled next-gen N2 and A16/A14 processes with performance/efficiency improvements, and introduced CFET transistor designs achieving double density;

➂ Demonstrated 3D Fabric innovations (SoIC/CoWoS), wafer-scale AI systems (SoW-X), and specialized automotive/IoT solutions including RRAM/MRAM and N4C RF for emerging wireless standards.

➀ TSMC will establish its European Design Centre (EUDC) in Munich in Q3 2025 to support European customers in designing high-performance, energy-efficient chips for automotive, AI, IoT, and industrial applications;

➁ The center aims to drive process technology development, foster expertise in automotive and non-volatile memory (e.g., RRAM/MRAM), and collaborate with global design teams;

➂ The EUDC will join TSMC's global network, enhancing chip design innovation and strengthening industry partnerships across key sectors.

➀ An international research team led by Prof. Qing-Tai Zhao proposes that operating computer chips at cryogenic temperatures could reduce energy consumption by up to 80%, addressing the high energy demands of data centers and AI infrastructure;

➁ Cryogenic computing leverages the improved efficiency of transistors at low temperatures but faces challenges like material defects and quantum tunneling, requiring novel materials and architectures (e.g., gate-all-around nanowires, high-k dielectrics) to optimize CMOS technology;

➂ Applications span quantum computing, space exploration, and high-performance data centers, with TSMC actively developing chips tailored for cryogenic environments to enhance energy efficiency and integrate with quantum processors.

❶ TSMC's limited-edition employee-exclusive suitcase resells for up to $16,700 on platforms like Shopee Taiwan, driven by rarity and collector demand.

❷ The 20-inch suitcase, co-branded with Eminent, uses German-made Makrolon polycarbonate for durability and lightweight design, with a 5-year warranty.

❸ Despite some sellers offering pre-orders at lower prices, fulfillment risks and inflated resale valuations highlight the absurdity of the secondary market frenzy.

➀ TSMC warns U.S. semiconductor tariffs could reduce demand for its Arizona fab, threatening its $165 billion investment timeline;

➁ Dell and HP oppose tariffs, citing insufficient U.S. chipmaking infrastructure and risks to domestic R&D/security;

➂ Intel seeks exemptions for U.S.-made wafers but admits full local supply chains are economically unfeasible.

➀ MediaTek plans to tape out its 2nm chip in September 2025, a major leap in semiconductor technology;

➁ The development highlights its collaboration with TSMC, leveraging advanced process nodes to compete in mobile and AI markets;

➂ The 2nm chip aims to enhance performance and efficiency for next-gen smartphones and AI-driven applications.