➀ Imagination exits the RISC-V CPU business; ➁ Focus on GPU and AI IP; ➂ Maintains commitment to the RISC-V ecosystem; ➃ RISC-V CPU IP portfolio limited in scope; ➄ Shift in focus seen as ironic given Imagination's history with MIPS.
Recent #RISC-V news in the semiconductor industry
➀ A cluster of six MIPS P8700 RISC-V cores can be replicated up to 64 times; ➁ This supports 768 execution threads.
➀ Hacker Aedan Cullen gains access to the OTP secret by glitching the RISC-V cores of the RP2350; ➁ The RP2350 was introduced as a successor to the RP2040 with added security features; ➂ The hacking challenge was to uncover a secret hidden in the RP2350's OTP memory.
➀ Ubitium, a RISC-V startup, is developing a universal processor that combines CPU, GPU, DSP, and FPGA functionalities.➁ The processor, based on a workload-agnostic microarchitecture, aims to revolutionize the industry.➂ The chip is scheduled to be released in two years, but the timeline might be more aspirational than concrete.
➀ Sales of RISC-V chips are unprofitable for companies, and RISC-V suppliers are discussing chip architectures at SC conferences.
➁ RISC-V's performance is far from comparable to x86 and ARM processors.
➂ RISC-V is highly flexible and suitable for small chips, and can be paired with any type of interconnect, storage, or I/O.
➀ Mouser has launched its RISC-V resource center to educate design engineers on the latest technology and applications. The center provides articles, blogs, eBooks, and products from Mouser’s technical team and manufacturing partners. It discusses how RISC-V is advancing machine learning closer to the edge in various devices.➁ Mouser offers a range of semiconductors and electronic components for RISC-V applications, including Renesas Electronics’ RISC-V MCU Fast Prototyping Board and Raspberry Pi Pico 2.➃ The resource center explores the benefits of RISC-V technology in areas such as consumer electronics, industrial sensors, and healthcare devices.
➀ Axelera AI, founded in 2021, aims to provide scalable edge AI hardware and software solutions.
➁ The company has raised USD 120 million and has a world-class team of over 190 employees.
➂ Axelera AI's Metis platform offers high performance with low power consumption, targeting applications like computer vision, automotive, and healthcare.
➀ A new chiplet-based RISC-V vector processor architecture aims to balance performance, efficiency, and flexibility for AI workloads.
➁ The architecture utilizes modular chiplets, including a vector processing chiplet and a matrix multiplication accelerator, to optimize various AI computation aspects.
➂ The RISC-V solution addresses memory bottlenecks and enhances energy efficiency with time-based execution and dynamic power gating.
➀ Semidynamics, founded in 2016, transitioned from RISC-V design services to licensing customizable 64-bit RISC-V processor IP in 2019.
➁ UPMEM's selection of Semidynamics' IP for large language models in 2024 led to increased interest from other fabless semiconductor companies.
➂ The company is focusing on providing customized solutions and encouraging early collaboration to address challenges and meet future demands in the AI sector.
➀ A new architecture for RISC-V CPUs introduces advanced matrix extensions and custom quantization instructions that significantly improve CNN acceleration.
➁ The design features scalable, VLEN-agnostic matrix multiplication instructions, ensuring consistent performance across different hardware configurations.
➂ A 2D load/store unit optimizes memory access for matrices, reducing overhead and increasing computational efficiency.
➀ Bing Xue discusses his journey into Formal Verification; ➁ Challenges faced in learning FV without structured courses; ➂ Benefits of Axiomise FV courses in understanding and applying FV techniques.
➀ The importance of asking the right questions to IP vendors and ensuring functional models are in place; ➁ The challenges of verifying CPU IP, especially high-performance designs; ➂ The role of RISC-V in the open-source ecosystem and the importance of collaboration among vendors.
➀ The evolving verification requirements of RISC-V as the architecture gains adoption; ➁ The role of standardization and infrastructure in supporting RISC-V’s growth; ➂ Challenges and opportunities in open-source functional verification for RISC-V.
➀ Semidynamics introduces a unified, programmable solution with a single software stack for Core, Vector, and Tensor processing units; ➁ The company's 'All-in-One IP' solution addresses the challenges of data availability and processing for AI applications; ➂ Semidynamics leverages RISC-V architecture for adaptability and control, offering configurable and customizable IP solutions.
➀ The DVCon Europe 2024 conference highlighted the rise of AI and software in design and verification. ➁ Keynotes from Infineon and Zyphra discussed AI microcontroller architectures and datacenter-scale AI systems. ➃ Software-defined vehicles and open-source technologies like RISC-V were also key topics.
➀ Synopsys will host the IP Processor Summit 2024 in Santa Clara, focusing on RISC-V solutions for IoT and automotive applications. ➁ The keynote speaker, Alexander Kocher, CEO of Quantauris, will discuss the benefits and challenges of RISC-V adoption. ➂ The event will provide in-depth information on ARC-V™ RISC-V processor IP and other related technologies.
1. Codasip introduces Studio Fusion with Custom Bounded Instructions (CBI) to simplify and secure RISC-V processor customization; 2. CBI ensures that customizations do not cause processor exceptions, reducing development time and risk; 3. Codasip provides comprehensive tools including compiler and debugger, enhancing micro-architectural awareness for better optimization.
1. Breker Verification Systems introduces advanced RISC-V verification solutions at #61DAC, covering core verification and system coherency. 2. The company's Trek family leverages AI technology for test suite synthesis, enhancing bug detection and coverage. 3. Breker's solutions support multiple environments including simulation, emulation, and post-silicon, ensuring comprehensive verification for complex semiconductor designs.
1. Achronix与Bluespec合作，将RISC-V处理器作为软核集成到Speedster7t FPGA中。2. 双方讨论了合作的动机，包括利用Achronix的2D NoC技术进行紧密的CPU加速。3. Bluespec的RISC-V核心支持定制指令，适用于管理加速器和I/O，与Achronix的FPGA技术形成互补。