➀ A cluster of six MIPS P8700 RISC-V cores can be replicated up to 64 times; ➁ This supports 768 execution threads.
Related Articles
- CEO Interview with Fabrizio Del Maffeo of Axelera AI4 months ago
- Embedded World 2025: Get the full Electronics Weekly Guide4 months ago
- Embedded World: Seeding the ground for automotive RISC-V4 months ago
- China's SpacemiT develops 64-core RISC-V datacenter CPU — 12nm chip allegedly performs like a 10-year old Xen or Opteron but with higher core count6 months ago
- Notes from DVCon Europe 20249 months ago
- LED matrix driver, touch matrix driver and RISC-V in one IC9 months ago
- Synopsys IP Processor Summit 202411 months ago
- GPNPU has multi-core cluster options for +100TOPSabout 1 year ago
- Small, Fast, And Powerful Car Module4 months ago
- Tesla's Q1 Delivery Could Dip Below 300,000, Causing A Big Correction4 months ago