1. DRAM and NAND Flash revenues are projected to increase by 75% and 77% respectively in 2024, driven by higher bit demand and improved supply-demand balance. 2. High-value products like HBM, DDR5, and LPDDR5/5X are expected to boost DRAM ASPs significantly. 3. NAND Flash revenue growth is supported by the adoption of QLC SSDs in enterprise and smartphones, and restrained capital expenditures by manufacturers.
Recent #DRAM news in the semiconductor industry
1. Micron expands its datacenter DRAM portfolio with MR-DIMMs, offering higher bandwidth and capacity. 2. MR-DIMMs use a data buffer to double transfer rates at standard DDR5 speeds. 3. Micron's MR-DIMMs are designed for Intel's Xeon 6 Family, showing significant performance improvements in benchmarks.
1. Jusung Engineering is developing ALD technology to reduce the number of steps in the EUV process. 2. The chairman of Jusung Engineering, Chul Joo Hwang, believes that stacking transistors will be the future of semiconductor development. 3. This approach is seen as necessary due to the limitations in scaling DRAM and logic chips, similar to how NAND stacks transistors.
1. KCTech's supercritical fluid cleaner is being evaluated by SK Hynix for use in its DRAM production line. 2. SK Hynix currently procures this equipment from Tokyo Electron. 3. If KCTech passes the evaluation, it will become a secondary supplier.
1、探索了亚20纳米DRAM中RowPress引起的泄漏的物理机制;2、对比了单面和双面RowPress与Row Hammer,重点研究电子迁移和电容串扰;3、确定增加的电场是RowPress效应的主要贡献者,与Row Hammer的e-trap辅助机制不同;4、研究了RowPress的位翻转方向性、温度依赖性、访问模式依赖性和数据模式依赖性;5、评估了RowPress效应的可扩展性,为开发缓解技术和增强DRAM的可靠性和安全性提供了理论基础。
1. SK hynix is accelerating the development of HBM4 and HBM4E memory, originally planned for mass production in 2026 and 2027 respectively. 2. Now, HBM4 is set for mass production in 2025, and HBM4E will enter mass production in 2026, aligning with NVIDIA's accelerated AI accelerator release cycle. 3. The next-generation HBM4 offers a 40% increase in bandwidth and a 70% reduction in power consumption compared to HBM3E, which is the fastest memory in the world.
1. Micron Technology is building new test production lines for advanced HBM in the US; 2. The company is also considering HBM manufacturing in Malaysia for the first time; 3. Micron aims to triple its market share for HBM by 2025, targeting a 'mid-20' percentage range.
1. Q1 DRAM revenues increased by 5.1% despite a fall in units, driven by contract ASP increases. 2. The Big Three in DRAM saw seasonal shipment declines but benefited from price increases. 3. Mobile DRAM prices rose the most due to strong sales of Chinese smartphones, while consumer DRAM had the lowest price rises.
1、SK海力士计划在10nm Gen 6(1c)DRAM生产中使用Inpria的金属氧化物阻抗(MOR)。
2、MOR将被用于绘制1cDRAM的最细线路。
3、Inpria是日本化学公司JSR的子公司,自2022年以来一直与SK海力士合作开发MOR。
As LPCAMM2 adoption begins, the first retail memory modules are finally starting to hit the retail market, courtesy of Micron. The memory manufacturer has begun selling their LPDDR5X-based LPCAMM2 memory modules under their in-house Crucial brand, making them available on the latter's storefront. Timed to coincide with the release of Lenovo's ThinkPad P1 Gen 7 laptop – the first retail laptop designed to use the memory modules – this marks the de facto start of the eagerly-awaited modular LPDDR5X memory era.
Micron's Low Power Compression Attached Memory Module 2 (LPCAMM2) modules are available in capacities of 32 GB and 64 GB. These are dual-channel modules that feature a 128-bit wide interface, and are based around LPDDR5X memory running at data rates up to 7500 MT/s. This gives a single LPCAMM2 a peak bandwidth of 120 GB/s. Micron is not disclosing the latencies of its LPCAMM2 memory modules, but it says that high data transfer rates of LPDDR5X compensate for the extended timings.
Micron says that LPDDR5X memory offers significantly lower power consumption, with active power per 64-bit bus being 43-58% lower than DDR5 at the same speed, and standby power up to 80% lower. Meanwhile, similar to DDR5 modules, LPCAMM2 modules include a power management IC and voltage regulating circuitry, which provides module manufacturers additional opportunities to reduce power consumption of their products.
Source: Micron LPDDR5X LPCAMM2 Technical Brief
It's worth noting, however, that at least for the first generation of LPCAMM2 modules, system vendors will need to pick between modularity and performance. While soldered-down LPDDR5X memory is available at speeds up to 8533 MT/sec – and with 9600 MT/sec on the horizon – the fastest LPCAMM2 modules planned for this year by both Micron and rival Samsung will be running at 7500 MT/sec. So vendors will have to choose between the flexibility of offering modular LPDDR5X, or the higher bandwidth (and space savings) offered by soldering
We are in the semiconductor market phase where everybody disagrees on what is going on. The market is up; the market is down. Mobile phones are up…. oh no, now they are down. The PC market is up—oh no, we need to wait until we can get an AI PC. The inflation is high—the consumer is not buying.
For us in the industry, the 13-week financial … Read More
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Robert Dennard, father of DRAM, is deceased — also known for his foundational Dennard scaling theory
Robert Heath Dennard, a pioneer in electrical and computer engineering who invented DRAM, passed away on April 23, 2024. He will also be remembered for Dennard Scaling theory, based on Moore’s law.
Samsung was considering applying metal oxide resist (MOR) during the extreme ultraviolet (EUV) lithography process for its next-generation DRAM, TheElec has learned.MOR is considered the next-generation photoresist (PR) to the chemically amplified resist (CAR) currently used in the lithography of ad
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