➀ CEA-Leti and Quobly have developed a novel solution using FD-SOI CMOS technology for simultaneous microsecond readouts of tens of quantum devices.

➁ The solution reduces readout power consumption by 10x and footprint by 2x.

➂ The proposed readout circuit based on a capacitive-feedback transimpedance amplifier (CTIA) achieves an 18.5μW/qubit power consumption.

➀ CEA-Leti's FAMES Pilot Line aims to enhance performance and reduce power consumption for mixed-signal circuits.

➁ The line focuses on five technology sets enabling new chip architectures, including FD-SOI at 10nm and 7nm, eNVM, RF components, 3D integration technologies, and small inductors.

➂ The technologies are expected to create market opportunities for various applications and will be accessible to researchers, SMEs, and industrial companies across Europe and partner countries.