1. Siemens Digital Industries Software introduces a tool for rapid transistor-level isolation of scan chain defects at 5nm nodes; 2. The tool enhances diagnosis resolution by over 1.5x, reducing the need for extensive failure analysis; 3. Tessent Hi-Res Chain uses layout-aware and cell-aware technology to pinpoint defect locations and mechanisms.
Related Articles
- CHIIPS #18 – Chip design insights from Ras Attale of Tessent Embedded Analytics27 days ago
 - Analogue test software claims to reduce testing time from months to daysabout 1 month ago
 - Tessent MemoryBIST Expands to Include NVRAMabout 2 months ago
 - Perforce and Siemens at #62DAC2 months ago
 - Perforce and Siemens: A Strategic Partnership for Digital Threads in EDA2 months ago
 - Siemens, Arm and Southampton Uni announce Cre8Ventures Education Program3 months ago
 - DAC TechTalk – A Siemens and NVIDIA Perspective on Unlocking the Power of AI in EDA3 months ago
 - Digital Implementation and AI at #62DAC3 months ago
 - Arm licenses Siemens Veloce verification software for Neoverse4 months ago
 - Most Read – Codasip sale, PCB design, Intel 14A4 months ago