<p>➀ In 2007, IMEC's Rudy Lauwereins stated that EUV was not mature enough for 32nm and likely 22nm semiconductor nodes, favoring immersion and double patterning techniques instead;</p><p>➁ Double patterning faced challenges like doubled mask costs and wafer throughput time, while device leakage issues at 22nm geometries highlighted scaling limits;</p><p>➂ IMEC proposed 3D-SIP (3D system-in-package) as a solution to sustain Moore’s Law momentum amid lithography and scaling barriers.</p>