由中科院计算所主导的开源RISC-V项目香山(XiangShan)凭借Chisel硬件设计语言和纳米湖/昆明湖双核心架构,首次实现RISC-V处理器在移动端与服务器端的算力突破。但令人深思的是,其在推测执行等传统技术上采取的保守策略,正引发行业对RISC-V创新本质的深层追问。本文揭示:预测性执行架构或将开启后推测时代,带来真正的处理器范式革命。
Related Articles
- Webinar: Unlocking Next-Generation Performance for CNNs on RISC-V CPUs7 months ago
- Relationships with IP Vendors9 months ago
- Changing RISC-V Verification Requirements, Standardization, Infrastructure9 months ago
- S2C Advances RISC-V Ecosystem, Accelerating Innovation at 2025 Summit China3 days ago
- CEO Interview with Bob Owen of Owens Design6 days ago
- CEO Interview with Karim Beguir of InstaDeep6 days ago
- Unlocking Efficiency and Performance with Simultaneous Multi-Threading11 days ago
- Codasip platform accelerates CHERI adoption4 months ago
- Over 250 billion Arm chips have shipped since the first ARM1 processor launched 40 years ago4 months ago
- 2D 32-bit RISC-V processor4 months ago