<p>➀ Soitec collaborates with PSMC to supply TLT-ready wafers for advanced 3D chip stacking, marking the first public reveal of its TLT technology；</p><p>➁ The technology enables ultra-thin transistor layer transfers (5nm-1µm), enhancing chip power efficiency and supporting vertical architectures like backside power delivery；</p><p>➂ Utilizes Smart Cut and IR laser processing to lift layers without thermal stress, advancing applications in AI, autonomous driving, and mobile devices.</p>