➀ Tags in PCIe TLPs are identifiers for non-posted requests, ensuring consistency between requests and completions. ➁ As PCIe speeds increase, tag size has expanded from 8-bit to 14-bit to optimize performance. ➂ PCIe 6.0 mandates specific tag size capabilities for functions operating at higher speeds. ➃ Configuration registers for tag sizes are detailed, with 14-bit tags having unique settings in the Device 3 Extended Capability Structure. ➄ Combinations of tag size enablement determine the maximum tag size and permissible tag value ranges.